搜索资源列表
FIFO
- 采用IP生成的同步FIFO代码资料，希望对大家有帮助！-Synchronous FIFO using IP generated code data, we want to help!
51_uart_fifo51
- 51_uart_fifo51 串口收发程序源代码 环形缓冲区实现-Serial transceivers to achieve ring buffer source code
linux-fifo
- linux fifo 、fork、msg等示例代码，程序包中包含多个不同版本，供参考学习！-linux fifo, fork, msg and other sample code package contains several different versions, for reference to learn!
the-theory-of-send-FIFO
- easyarm1138发送ＦＩＦＯ工作原理代码-easyarm1138 transmit FIFO works code
fifo.vhdl
- 异步fifo的vhdl源代码,可实现异步信号的传送-The asynchronous fifo vhdl source code, enabling the transmission of asynchronous signals
fifo
- 一个FIFO产生程序，主要是一个格雷码的加法器-A FIFO generation process, is primarily a gray code adder
syn_fifo
- synchronous fifo. This is a fifo code of a synchronous fifo.
General-memory-VHDL-code-library
- 通用存储器VHDL代码库。fifo,ram寄存器的代码和测试模块。-General-purpose memory VHDL code base. fifo, ram register code and test modules.
fifo
- 异步fifo的verilogHDL代码 通过比较读写地址并产生异步空/满标志，再通过把异步空/满标志同步到相应时钟域来实现数据的传递。很好的解决了亚稳态的问题。-code of asynchronous fifo
Flag-of-asynchronous-FIFO
- Quartus平台，VHDL代码编写的带标志位的异步FIFO。-Quartus platform, VHDL code is written with the sign bit of the asynchronous FIFO.
68013-FIfo
- cy68013开发资料，上位机、固件和FPGA读写，如有什么问题可以QQ我，共同探讨，QQ:29077181-CY68013 code
aFIFO
- 异步fifo代码。包含GrayCounter计数的算法代码-Asynchronous fifo code， contains GrayCounter counting code
FIFO
- 异步FIFO Verilog源代码，对控制读写地址进行设计，以便写满和读空只产生一个标志，实现对FIFO的缓冲控制-Asynchronous FIFO Verilog source code, designed to control read and write addresses in order to fill and read empty produce only one flag, the FIFO buffer control
fifo
- 完成整个Wimax的上下行的基带算法的DSP的源代码-The code for wimax downlink
fifo
- 模拟页式虚拟存储管理中硬件的地址转换和用先进先出调度算法处理缺页中断.虽然是文档文件，其源代码可以直接拷贝至C++运行，并且文档最后给出相应执行结果。-Simulation of the hardware address translation page of virtual storage management and FIFO scheduling algorithm for processing a page fault, although it is a document file an
fifo
- actel 的同步硬件fifo的testbench,初学者可以看一下testbench怎么写的。-the testbench code of actel fpga,it is right for new learner~
FIFO
- 这是本人学习FPGA时亲自原创的代码，实现的是8x8的fifo结构，采用同步的FIFO结构，仿真测试已经成功！-This is I learn when the original code FPGA in person, the realization of 8 x8 is the fifo structure, the synchronization of the fifo structure, the simulation test is a success!
fifo
- 异步FIFO源代码，由模块调用自动生成，不包含测试向量。-Asynchronous FIFO source code automatically generated by the module calls, does not contain the testbench.
FIFO
- vhdl code for first in first out
fifo
- 同步fifo的verilog代码，很好的资料，值得学习-Synchronous fifo verilog code, very good information, it is worth learning